Add #%01011101,R1 , when this instruction is executed then ______
1.The binary addition between the operands takes place
2.The Numerical value represented by the binary value is added to the value of R1
3.The addition doesn’t take place, whereas this is similar to a MOV instruction
4.None of the mentioned
Add #45, when this instruction is executed the following happen/s _______
1.The processor raises an error and requests for one more operand
2.The value stored in memory location 45 is retrieved and one more operand is requested
3. The value 45 gets added to the value on the stack and is pushed onto the stack
4.None of the mentioned
An 24 bit address generates an address space of ______ locations.
1.1024
2.4096
3.248
4.16,777,216
 In the case of, Zero-address instruction method the operands are stored in _____
1.Registers
2. Accumulators
3.Push down stack
4.Cache
 In the implementation of a Multiplier circuit in the system we make use of _______
1.Counter
2.Flip flop
3. Shift register
4.Push down stack
 The instruction, Add R1,R2,R3 in RTN is _______
1. R3=R1+R2+R3
2. R3<-[R1]+[R2]+[R3]
3.R3=[R1]+[R2]
4.R3<-[R1]+[R2]
 The register used to store the flags is called as _________
1.Flag register
2.Status register
3.Test register
4. Log register
 The smallest entity of memory is called _______
1.Cell
2. Block
3. Instance
4.Unit
 When we perform subtraction on -7 and 1 the answer in 2’s complement form is _________
1.1010
2.1110
3. 0110
4. 1000
 Which of the following techniques used to effectively utilize main memory?
1.Address binding
2.Dynamic linking
3.Dynamic loading
4.Both Dynamic linking and loading
Can you perform an addition on three operands simultaneously in ALN using Add instruction?
1.Yes
2.Not possible using Add, we’ve to use AddSetCC
3.Not permitted
4. None of the mentioned
Complete the following analogy:- Registers are to RAM’s as Cache’s are to _______
1.System stacks
2.Overlays
3.Page Table
4.TLB
Does the Load instruction do the following operation/s?
1.Loads the contents of a disc onto a memory location
2.Loads the contents of a location onto the accumulators
3.Load the contents of the PCB onto the register
4.None of the mentioned
During the transfer of data between the processor and memory we use ______
1.Cache
2.TLB
3.Buffers
4.Registers
For the addition of large integers, most of the systems make use of _____
1.Fast adders
2.Full adders
3.Carry look-ahead adders
4. None of the mentioned
If a system is 64 bit machine, then the length of each word will be _______
1.4 bytes
2.8 bytes
3. 16 bytes
4.12 bytes
If we want to perform memory or arithmetic operations on data in Hexa-decimal mode then we use _________ symbol before the operand.
1. ~
2.!
3.$
4. *
In a normal n-bit adder, to find out if an overflow as occurred we make use of ______
1.And gate
2.Nand gate
3.Nor gate
4.Xor gate
In a system, which has 32 registers the register id is __________ long.
1.16 bit
2. 8 bits
3.5 bits
4. 6 bits
In some pipelined systems, a different instruction is used to add to numbers which can affect the flags upon execution. That instruction is _____
1.AddSetCC
2.AddCC
3.Add++
4.SumSetCC
In the following indexed addressing mode instruction, MOV 5(R1), LOC the effective address is ______
1.EA = 5+R1
2.EA = R1
3. EA = [R1]
4.EA = 5+[R1]
Physical memory is divided into sets of finite size called as ______
1.Frames
2.Pages
3.Blocks
4.Vectors
RTN stands for _____
1.Register Transfer Notation
2.Register Transmission Notation
3.Regular Transmission Notation
4.Regular Transfer Notation
The addressing mode which makes use of in-direction pointers is ______
1. Indirect addressing mode
2. Index addressing mode
3.Relative addressing mode
4.Offset addressing mode
The addressing mode, where you directly specify the operand value is _______
1.Immediate
2. Direct
3.Definite
4. Relative
The addressing mode/s, which uses the PC instead of a general purpose register is ______
1. Indexed with offset
2.Relative
3.Direct
4.Both Indexed with offset and direct
The BOOT sector files of the system are stored in ______
1. Harddisk
2.ROM
3.RAM
4.Fast solid state chips in the motherboard
The collection of the above mentioned entities where data is stored is called ______
1. Block
2.Set
3.Word
4.Byte
The effective address of the following instruction is MUL 5(R1,R2).
1.5+R1+R2
2.5+(R1*R2)
3.5+[R1]+[R2]
4. 5*([R1]+[R2])
The Flag ‘V’ is set to 1 indicates that _____________
1.The operation is valid
2.The operation is validated
3.The operation has resulted in an overflow
4. None of the mentioned
The instruction, Add #45,R1 does _______
1.Adds the value of 45 to the address of R1 and stores 45 in that address
2.Adds 45 to the value of R1 and stores it in R1
3.Finds the memory location 45 and adds that content to that of R1
4.None of the mentioned
The instruction, Add Loc,R1 in RTN is _____
1. AddSetCC Loc+R1
2.R1=Loc+R1
3.Not possible to write in RTN
4.R1<-[Loc]+[R1]
The most efficient method followed by computers to multiply two unsigned numbers is _______
1.Booth algorithm
2.Bit pair recording of multipliers
3.Restoring algorithm
4.Non restoring algorithm
The processor keeps track of the results of its operations using flags called ________
1.Conditional code flags
2. Test output flags
3.Type flags
4.None of the mentioned
The technique used to store programs larger than the memory is ____________
1.Overlays
2.Extension registers
3.Buffers
4.Both Extension registers and Buffers
The transfer of large chunks of data with the involvement of the processor is done by _____
1.DMA controller
2.Arbitrator
3.User system programs
4.None of the mentioned
The two phases of executing an instruction are ______
1. Instruction decoding and storage
2. Instruction fetch and instruction execution
3.Instruction execution and storage
4. Instruction fetch and Instruction processing
The type of memory assignment used in Intel processors is _____
1.Little Endian
2.Big Endian
3.Medium Endian
4.None of the mentioned
The unit which acts as an intermediate agent between memory and backing store to reduce process time is ________
1.TLB’s
2.Registers
3.Page tables
4.Cache
To get the physical address from the logical address generated by CPU we use ________
1.MAR
2.MMU
3.Overlays
4.TLB
When 1101 is used to divide 100010010 the remainder is ______
1.101
2.11
3.0
4.1
When generating physical addresses from a logical address the offset is stored in __________
1.Translation look-aside buffer
2.Relocation register
3.Page table
4. Shift register
When using the Big Endian assignment to store a number, the sign bit of the number is stored in _____
1.The higher order byte of the word
2.The lower order byte of the word
3. Can’t say
4. None of the mentioned
When we perform subtraction on -7 and -5 the answer in 2’s complement form is ________
1.11110
2. 1110
3.1010
4.10
When we subtract -3 from 2 , the answer in 2’s complement form is _________
1.1
2.1101
3.101
4.1001
Which method of representation has two representations for ‘0’?
1.Sign-magnitude
2.1’s complement
3.2’s complement
4.None of the mentioned
Which method/s of representation of numbers occupies a large amount of memory than others?
1.Sign-magnitude
2. 1’s complement
3.2’s complement
4. 1’s & 2’s compliment
Which representation is most efficient to perform arithmetic operations on the numbers?
1. Sign-magnitude
2.1’s complement
3.2’S complement
4.None of the mentioned
____ addressing mode is most suitable to change the normal sequence of execution of instructions.
1.Relative
2.Indirect
3.Index with Offset
4.Immediate
_____ method is used to map logical addresses of variable length onto physical memory.
1.Paging
2.Overlays
3.Segmentation
4.Paging with segmentation